1. Field of the Invention
The present invention relates to a calibrated-weight balance for the construction of very-high-speed analog-to-digital converters. This balance makes use of a Schmitt trigger consisting of normally-off transistors and having dimensions calculated so that the trigger or bistable circuit changes state as a function of the value of the input signal with respect to the value of one of the two drain resistors of the transistors, which is precisely the calibrated-weight resistor.
2. Description of the Prior Art
Analog-to-digital converters are widely employed in many different kinds of equipment, for processing analog signals transmitted by overhead lines or by coaxial cable. However, they constitute a weak point in the signal-processing chain by because of their relatively slow speed. For instance earth-orbiting satellites are provided with electronic systems operating at several gigahertz. Other types of equipment utilize the transparency of the atmosphere at 94 GHz, however the medium-resolution analog-to-digital converters at present known have a speed of the order of 500 MHz.
By utilizing normally-off two-dimensional electron-gas transistors and by virtue of a very simple design concept, the calibrated-weight balance in accordance with the invention permits the construction of analog-to-digital converters which operate at rates above 2 GHz with a resolution of five or six bits, for example.
Basically, the balance in accordance with the invention consists of a bistable multivibrator of the Schmitt trigger type in which two field-effect transistors (FETs) are supplied by a third transistor which operates as a current source and is in turn controlled by a clock signal through a direct-coupled FET logic inverter (DCFL inverter).
A first transistor of the bistable multivibrator type constitutes the reference channel and is mounted with a grounded source whilst its drain is connected to the center tap of a divider. This divider is constituted by a resistor connected to ground and by a resistor connected to the current source. These two resistors are fixed.
A second transistor of the bistable multivibrator constitutes the measuring channel and is mounted with a grounded source, its drain being connected to the center tap of a divider. Said divider is constituted by a resistor connected to the current source and by a third transistor, the source of which is connected to a reference voltage. The input analog signal is applied to the gate of said third transistor and the measuring channel supply resistor constitutes the calibrated weight of the balance in accordance with the invention.
The two complementary outputs of the balance are taken from the drains of the two transistors of the bistable multivibrator. Depending on the value of the analog signal applied to the gate of the third transistor, one of these two outputs is at the logic level 1 and the other output is at the logic level 0 or conversely.
In an analog-to-digital converter which makes use of the balances in accordance with the invention, each balance is characterized by its resistor in series with the third transistor, the value of this latter being dependent on the rank of the balance in the converter.